On the other hand, the parts that TI sells to implement optimizers (those ASICs you mentioned) has a recommended design associated with it, and it does not "fail safe." Perhaps there is additional circuitry inside the optimizers that does that; I would be curious to see if there is.
But if the device fails closed and the panel is shorted, why would you lose the whole string in that case? Wouldn't you just have 1 less panel in the string and the other optimizers in the other panels would make adjustment on their DC output to compensate for the loss in voltage of the failed optimizer?
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